4i2i Communications (2004-08)

Title: Image processing SoC IP core
Research Engineer: Graeme Stewart
Sponsor: 4i2i Communications Ltd.
Academic Supervision: TBC

This project relates to constructing a suitable SoC platform design using 4i2i's existing video CODECs and Internet video streaming software along with a third party embedded processor and then enhancing this with a library of low level pixel processing hardware and associated higher level software running on the embedded processor in order to address applications which need Internet video streaming and real-time image processing.

4i2i has developed a number of video coding IP core CODECs which compress and decompress digital video using International video coding standards such as MPEG4 and H.264. Many consumer and industrial products require that these CODECs are utilised in a SoC design along with an embedded processor core running an operating system such as embedded Linux. A frequent requirement is that real-time image processing is performed on the video in order to automate the visual detection and analysis of certain events. 

The initial focus will be on an intelligent CCTV security camera capable of image processing for functions such as motion detection, object recognition, object tracking and inspection.

The project will take a practical hand-on approach using a low cost FPGA platform, interfaced to a CCD camera sensor and capable of streaming real-time video over the Internet .