Aliathon 02 (2003-07)

Title: Data Synchronisation Across Packet Based Networks
Research Engineer: Peter Sinka
Sponsor: Aliathon
Academic Supervision: Dr Brian Flynn and Dr John Thompson, University of Edinburgh

This project investigates the use of Field Programmable Gate Arrays (FPGAs) for telecommunication applications. The advent of packet based networks and the preference for mainly digital system architectures has led to a number of challenges for developers. The project addresses one of the fundamental problems with cross protocol telecommunication within a digital device; the problem of maintaining a reliable clock from one end of a constant bit rate channel to the other via a packet network.