ARM 02 (2005-09)

Title: Reliability implications of next generation SoCs

Research Engineer: Derek Graham
Sponsor: ARM
Academic Supervision: Dr Scott Roy and Dr Fernando Rodriguez,
University of Glasgow

Consideration of device reliability due to soft errors and wear-out is anticipated to become an increasingly prevalent requirement in future process geometries as feature size and voltage decrease, and still today, we have difficultly in understanding the detailed consequences and system wide effects of such errors in processing systems. How do we design cost sensitive systems to deliver existing levels of reliability with increasingly unreliable silicon?

This research project aims to investigate the design and integration of dependable computing measures. It will investigate the fundamental factors affects device reliability; including analysis, trends, and detection and recovery mechanisms, and explore how these can be integrated into future SoCs. The project will also investigate how reliability measures impact system level design, the impact on multi-processor and data engine systems, and how these these can be reliably interconnected.

Initial proposals for key investigative areas:

1. Reliability of the single compute engine (Fundamentals of dependable computing; analysis, trends, integration and development of error detection and recovery mechanisms)
2. System level design and integration of multiple interconnected processing elements, data engines, and peripherals
   (ARM processor design and system level integration, processor interconnection, FPGA development)
3. Reliability at the system level, reliable interconnection, processing element wear-out and total system level reliability
   (Integration of 1 and 2)