SLI Ltd. (2008-12)

Title: Supercomputing with FPGAs
Research Engineer: Stefan Petko
Sponsor: SLI Ltd., Livingston
Academic Supervision: Dr Khaled Benkrid and Dr Mark Parsons, University of Edinburgh
Industrial Supervision: Dr Cade Wells, SLI Ltd.

Background: This project builds on the work of the FPGA High Performance Computing Alliance (www.fhpca.org) of which SLI Ltd. is a member, developing high-performance computing solutions using FPGAs to deliver new levels of performance into the technical computing market.

The advantages FPGAs have in implementing massively parallel algorithms and in lower power consumption are offset by the novel architecture which requires new tools and methodologies. The project will investigate issues arising from implementing computing solutions on FPGA-based high performance computers.

This project will make use of the Maxwell supercomputer, developed by FHPCA to demonstrate the feasibility of running computationally demanding applications on an array of FPGAs. Not only has Maxwell demonstrated the numerical performance achievable from reconfigurable computing, but it can be used as a testbed for tools and techniques to port applications to such systems.

The unique architecture of Maxwell comprises 32 blades housed in an IBM Blade Center. Each blade comprises one Xeon processor and 2 FPGAs. The FPGAs are connected by a fast communication subsystem which enables the total of 64 FPGAs to be connected together in an 8 x 8 toroidal mesh.

Based primarily in Livingston, Stefan will work closely with FHPCA members including Nallatech, Xilinx, Alpha Data, and the Edinburgh Parallel Computing Centre (EPCC). Research results will be shared with the FHPCA member community.

Project: Initial topics for investigation include:

• Communications
  • Managing the communications between the outside world and the FPGA array, between processes within an FPGA and between devices in an array of FPGAs.
• Design Flows
  • The design flows used in software development, and hardware design where FPGAs are used as electronic components or as processor accelerators, are not a good fit for role of the FPGA as a computer. Several approaches may be considered including: C to gates; HDL implementation such as VHDL; dataflow such as Matlab or Simulink; and tile or functional block based design. Integrating novel design flows with existing vendor tools will also be investigated.
• System Management
  • Loading application specific configurations into the FPGAs, allocating FPGA resource to a specific task, and freeing up resource when a task completes.