Micrel (1999-2003)

Title: High performance LC oscillator designed using an
array-based approach
Research Engineer: Paul Smith
Sponsor: Micrel
Academic Supervision: Prof Iain Thayne, University of Glasgow

The project is primarily aimed at the investigation and development of clock and data recovery (CDR) components for use in 10 GHz and 40 GHz fibre applications. The circuits are realised using an array-based approach to their design in order to speed up the manufacturing process and improve design turnaround time.

The impact of using a semi-custom approach on the achievable performance of these parts is investigated using both advanced industrial SiGe Bipolar and state of the art University GaAs pHEMT processes, with a view to creating optimal arrays for the manufacture of these CDR parts. The work continues with an exploration of the potential improvements in design turnaround and time-to-market that is achievable by using such a methodology.

A range of monolithic spiral inductors has now been measured and characterised. 10 GHz oscillator circuits (Fig. 1) have also been measured and the circuits are working with good phase noise performance. Additional phase noise measurement techniques are being carried out to gain further insight into circuit operation, with a view to developing a base-array for the development of a range of oscillator circuits.

Fig. 1 - Layout of 10 GHz differential LC oscillator

All circuit design for the project was undertaken at ISLI, the University of Glasgow and at Micrel Semiconductor. Circuit fabrication utilised the in-house III-V monolithic millimetre wave integrated circuit technology of the University of Glasgow and an internal Micrel SiGe Bipolar process. Circuit testing was performed using the on-wafer facilities at the University of Glasgow in conjunction with access to the test capabilities of Micrel.

The project doctoral thesis was submitted in February 2004 and the student graduated in July 2004. He is employed by Micrel.

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