QinetQ (2001-05)

Title: High-level design tools for FPGA SoC
Research Engineer: Jasmine Lam
Sponsor: QinetiQ
Academic Supervision: Dr Keith Brown and Dr Yvan Pettilot, Heriot-Watt University

Aims to develop a design methodology, supported by appropriate tools, that will make FPGAs accessible as an implementation platform for algorithm engineers working at a very high level of abstraction, e.g., directly from Matlab through to FPGA implementation. The methodology will provide synthesis of efficient DSP cores to implement the high-level algorithms, using a combination of a predefined, extensible library of efficient parameterised cores, and the automated decomposition of algorithms into more primitive operators together with the scheduling and control of these operators.

The prime application domains will be wireless communications and multimedia, but the project will also investigate the application of these methods to other areas such as radar, sonar and medical image and signal processing.

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